A Design and Evaluation of 0.5V Filter-less Digital Phase Locked Loop With A New Clock Synchronization Algorithm

Autor:	Kousuke Watanabe, Tomochika Harada
Rok vydání:	2019
Předmět:	Phase-locked loop Control theory Filter (video) Computer science Electrical and Electronic Engineering Clock synchronization
Zdroj:	IEEJ Transactions on Electronics, Information and Systems. 139:70-75
ISSN:	1348-8155 0385-4221
DOI:	10.1541/ieejeiss.139.70
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::d6e8612b649c44205d86481a297f3cf0 https://doi.org/10.1541/ieejeiss.139.70 Zobrazit plný text záznamu