Autor: |
Marc Pons Sole, Kazuyuki Kumeno, Nobuhiro Misawa, H. Kurata, Mutsuaki Kai, Ryota Nanjo, Taiji Ema |
Rok vydání: |
2017 |
Předmět: |
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Zdroj: |
2017 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S). |
DOI: |
10.1109/s3s.2017.8308741 |
Popis: |
Subthreshold operational characteristics of Ultra-Low Leakage (ULL) 6T-SRAM bit-cell and circuit based on the 55nm deeply depleted channel (DDC) technology was evaluated. The maximum operation frequency was 5 to 20 MHz (TT @RT) under 0 to 0.34V range of forward back bias (VBB) condition and leakage current in the retention mode reduced down to 285fA/cell by reverse VBB. It was confirmed that the ULL SRAM has sufficient static noise margin (SNM) to operate in the subthreshold region by optimizing NMOS and PMOS VBB separately. |
Databáze: |
OpenAIRE |
Externí odkaz: |
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