Logic simulation system using simulation processor (SP).
| Autor: | Saitoh, M., Iwata, K., Nakamura, A., Kakegawa, M., Masuda, J., Hamamura, H., Hirose, F., Kawato, N. |
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| Zdroj: | 25th ACM/IEEE, Design Automation ConferenceProceedings 1988; 1988, p225-230, 6p |
| Databáze: | Complementary Index |
| Externí odkaz: |
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