A Unifying Interface Abstraction for Accelerated Computing in Sensor Nodes

Autor:	Iyer, Srikrishna
Rok vydání:	2011
Předmět:	Communication Interface-Abstraction Architecture automatic code-generation TinyOS nesC GEZEL hardware/software co-design co-processor wireless sensor nodes CPU Field programmable gate arrays
Druh dokumentu:	Diplomová práce
Popis:	Hardware-software co-design techniques are very suitable to develop the next generation of sensornet applications, which have high computational demands. By making use of a low power FPGA, the peak computational performance of a sensor node can be improved without significant degradation of the standby power dissipation. In this contribution, we present a methodology and tool to enable hardware/software co-design for sensor node application development. We present the integration of nesC, a sensornet programming language, with GEZEL, an easy-to-use hardware description language. We describe the hardware/software interface at different levels of abstraction: at the level of the design language, at the level of the co-simulator, and in the hardware implementation. We use a layered, uniform approach that is particularly suited to deal with the heterogeneous interfaces typically found on small embedded processors. We illustrate the strengths of our approach by means of a prototype application: the integration of a hardware-accelerated crypto-application in a nesC application. Master of Science
Databáze:	Networked Digital Library of Theses & Dissertations
Externí odkaz:	http://hdl.handle.net/10919/34625 http://scholar.lib.vt.edu/theses/available/etd-08182011-172058/ Zobrazit plný text záznamu