Error Correction of Schematic Extraction from Microwave Multilayer Layout and Three-dimensional Graphical User Interface

Autor:	Zhi-Wei Cai, 蔡志偉
Rok vydání:	2017
Druh dokumentu:	學位論文 ; thesis
Popis:	105 In this thesis, a graphical verification tool is developed for microwave multilayer passive circuits, which are usually designed by hand, and cannot be verified by the existing layout versus schematic checker. We''ve surveyed the studies accomplished by our laboratory and revised the previous algorithms. With the existence of the layout to schematic extraction and the circuit netlist mapping program, this thesis is dedicated to the combination of them. This tool also supports three-dimensional display. The purpose is to reduce the time cost of mistakes and help users to verify the circuit. However, for different designers, like their personal habits or a lumped component in small value, the program is still unable to determine the layout to schematic mapping accurately.
Databáze:	Networked Digital Library of Theses & Dissertations
Externí odkaz:	http://ndltd.ncl.edu.tw/handle/8pjtx2 Zobrazit plný text záznamu