Subcircuits Study of a Transmitter for an Object Detection Radar
| Autor: | Wei-Hsiang Chiu, 邱韋翔 |
|---|---|
| Rok vydání: | 2016 |
| Druh dokumentu: | 學位論文 ; thesis |
| Popis: | 105 This thesis presents the designs of power amplifiers for 60GHz wireless communication system and FMCW radar system and the design of transmitter system on printed circuit board (PCB). The practice of the chip is completed by the TSMC CMOS 90-nm process technology provided by Chip Implementation Center (CIC). The power amplifiers are designed by power-combining technique. The content of this thesis includes theoretical induction for power amplifiers, the design for devices and circuits, simulation analysis, chip measurement, and result discussion. The practice of the PCB is to rule the connection of chip and element on PCB for high frequency. This thesis consists of six main parts: In Chapter one, research background and reviews of some former studies on power amplifiers will be briefly introduced. In Chapter two, we will introduce various type of power amplifiers, including their design issues, specifications, impedance matching methods, and the power- combining techniques. In Chapter three, it presents the design of a power amplifier using transformer- coupled to implement the power combining technique for V-band applications. In this chapter, the circuit structure, the design flow, and the transformer structures is narrated. This presented circuit is a class AB power amplifier that is composed of three stages of common source amplifiers, and uses transformer structures to design circuit’s impedance matching network and power splitters/combiners. At the 53 GHz measured frequency, the maximum power gain GP|max is 17.79 dB; the maximum power-added efficiency PAEmax is 16.9%; the saturated output power Psat is 13.793 dBm under input power being 10 dBm; the output power of 1-dB gain compression OP1dB is 13.36 dBm; the power consumption is 139 mW; and the chip size is 1.051*0.47 mm2. In Chapter four, it presents the implementation of the transmitter for FMCW radar system RF front-end in 24 GHz. In this chapter, the transmitter circuit structure and operation is narrated; and the circuit is designed on PCB board. As a FMCW system, it needs a triangle-shaped frequency versus time signal around 12 GHz. By mixer’s up-conversion, the signal is risen up to 24 GHz. At last, using power amplifier amplify this signal. The transmitter subsystem is design on PCB board, and signal path is designed in the line width of 50 ohm characteristic impedance. In Chapter five, it presents the design of a power amplifier using Wilkinson splitter and combiner to implement the power combining technique for 78-GHz applications. In this chapter, the circuit structure, the design flow, and the Wilkinson splitter and combiner is narrated. This presented circuit is a class AB power amplifier that is composed of three stages of common source amplifiers. The driver stages uses capacitors’ and transmission line’s series and shunt to match impedance. Wilkinson splitter and combiner are used to implement power splitters and combiners. At the 78 GHz simulated frequency, the maximum power gain GP|max is 10.557 dB; the maximum power-added efficiency PAEmax is 12.569%; the saturated output power Psat is 12.404 dBm under 6dBm input power; the output power of 1-dB gain compression OP1dB is 10.441 dBm; the power consumption is 111 mW; and the chip size is 0.989*0.729 mm2. In Chapter six, we make a simple conclusion and shortly discuss the possible study direction for the future work. |
| Databáze: | Networked Digital Library of Theses & Dissertations |
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