28nm High-k Metal-Gate 256kb Near-/Sub-threshold 6T SRAM Design
| Autor: | Li, Kuang-Yu, 李光宇 |
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| Rok vydání: | 2015 |
| Druh dokumentu: | 學位論文 ; thesis |
| Popis: | 104 In recent years, SRAMs are widely used as cache memory in high performance processor and embedded system. Because of the advantages of simple structure, high operation speed and high capacity density, the conventional 6T SRAM is the most widely used. With wearable devices and Internet of Things (IoT) is currently on the rise, Low-Power and Low-Voltage circuit design becomes a major trend in SoCs (System-On-Chip) nowadays. However, conventional 6T SRAM is hardly used to operate in low voltage due to severe read/write ability degradation in advanced process. This thesis presents a novel 6T Mini-array architecture with Vtrip tracing write assist (VTWA) to improve the write-ability. The Architecture can be operated with near/sub-threshold voltage. For low power application, we propose the Power-gating structure, and integrated low-swing voltage pre-charger with large-signal sensing scheme. The proposed near/sub-threshold 6T SRAM is demonstrated by a 1058 x 374 μm2 256kb SRAM macro in UMC 28nm high-k metal-gate (HKMG) CMOS technology. The full functionality is error-free under operating voltage from 0.9V to 0.4V. The measured maximum operation frequency is 866MHz at 0.9V, TT corner, 25℃. |
| Databáze: | Networked Digital Library of Theses & Dissertations |
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