Design of Gain-Adjustable Time Amplifier for Coarse-Fine Time-to-Digital Converters in 0.18 μm CMOS Process
| Autor: | Sheng-Kai Lin, 林盛凱 |
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| Rok vydání: | 2013 |
| Druh dokumentu: | 學位論文 ; thesis |
| Popis: | 101 With the improvement of technology, electronic products are miniaturized and are getting faster. Operating speed of transistors is getting faster and faster, with the problem, the operating voltage of the transistor is getting low. Low operating voltage results in difficulty of processing signals with high resolution in voltage domain, especially for analog circuits. On the contrary, transistors featured high speed can process signals with high resolution in time domain. In recent years, TDCs used for detecting time interval of specific events are widely applied in many fields such like all digital PLL, chip’s jitter, single molecule fluorescence spectroscopy, fluorescence imaging and laser scanning microscopy. In high speed situation, there have some very important issues about clock measurements; the data transmission and reception and the noise interference problems. This paper proposes an analog-implemented TA architecture which is different from the past works used a digital architecture of TA to achieve a large and precise time difference amplifying. With applied in a coarse-fine TDC, resolution of the TDC can be greatly enhanced. |
| Databáze: | Networked Digital Library of Theses & Dissertations |
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