Study of Novel High Integration-Density and Low Power Non-classical CTFET Inverter
| Autor: | Hsueh-liang Huang, 黃學良 |
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| Rok vydání: | 2013 |
| Druh dokumentu: | 學位論文 ; thesis |
| Popis: | 101 The research discusses a novel CTFET inverter which is composed of a N-typed TFET(NTFET) as a driven transistor and a Gated control I-I-P transistor as a loaded transistor, and discusses its characteristic and analysis. We name it “CGTFET”. According to the results, our proposed CGTFET inverter has correct logic behavior and its delay time is little slow when compared with the conventional CTFET. However, the CGTFET improves voltage overshoot phenomenon of the CTFET, and the power consumption of the CGTFET is lower than the conventional CMOS. In addition, because of the SOI structure and the N-type shared output node, our proposed CGTFET does not need any physical isolation technique, thereby improving the packing density. Our proposed CGTFET indeed obtain a 39.2 % reduction of the total area compared with the conventional Bulk-CMOS. Our proposed CGTFET also can achieve a 45.3 % reduction in the total area when compared with the SOI-CMOS. Our proposed CGTFET indeed obtain a 65.4 % reduction of the total area compared with the SOI-CTFET. More importantly, due to the reduced process steps, the cost reduction can be achieved. We therefore believe that a high packing density novel CTFET inverter with reduced process steps can become one of the contenders for future CTFET scaling. |
| Databáze: | Networked Digital Library of Theses & Dissertations |
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