The Design and Analysis of a Self-Oscillating Spread Spectrum Clock Generator
| Autor: | Chien-Heng Wong, 翁健恆 |
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| Rok vydání: | 2011 |
| Druh dokumentu: | 學位論文 ; thesis |
| Popis: | 99 According to the progress of the MOS process, the architecture of SoC is widely adopted in consumer electronic products nowadays. But the EMI caused by blocks in SoC has become an important issue especially for high-frequency signal transmission. Despite the high-cost method shielding the chip directly, other method such as SSCG which can be integrated on the chip becomes a popular and low-cost way to reduce the EMI. The SSC is a frequency-modulated signal; as a result, it spreads the power of the carrier frequency within specific BW and accomplishes the EMI reduction. Many techniques implementing SSC had been proposed including direct modulating on VCO, sigma-delta modulation, and open-loop method. Almost proposed methods generate SSC by adding extra modulating signal. In this thesis, a 6G-Hz PLL-based SSCG with self-oscillating technique is proposed. The PLL uses a 1st-order loop filter to make VCO control-line oscillate itself while introducing no extra quantization noise. With on-chip calculation and adjusting, modulating frequency will operate at 31.5-kHz and spectrum spread is 5000ppm. This work is fabricated in 90nm digital CMOS technology, occupies 0.54mm2 and consumes 14.4mW from a 1.2V supply. EMI reduction is 12.49dB. |
| Databáze: | Networked Digital Library of Theses & Dissertations |
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