Design of Multi-Standard Continuous-Time Quadrature Bandpass Delta-Sigma Modulators for Wireless Receivers

Autor: Chen-Yen Ho, 何丞諺
Druh dokumentu: 學位論文 ; thesis
Popis: 98
This thesis presents multi-standard Continuous-Time Quadrature Bandpass ΔΣ modulators for wireless receivers and innovative circuit techniques to improve linearity, increase dynamic range, and reduce power consumption. The idea of software-defined radio (SDR) is to develop a single transceiver which can integrate many wireless communication specifications which is introduced in Chapter 1. This thesis aims to study and implement the analog to digital data converter (ADC) for SDR receiver with Continuous-Time Quadrature Bandpass ΔΣ modulator architecture. In Chapter 2, the basic concepts of Continuous-Time ΔΣ modulator will briefly be discussed. During the process that Continuous-Time Quadrature Bandpass ΔΣ modulator converts the analog signal, components between the I/Q channels exist mismatch effects which degrades the linearity and resolution of total system. It’s called I/Q mismatch effects which will be analysed in detail in Chapter 3. In Chapter 4, according to these requirements, we proposed two works in this thesis. The first work is a Tri-mode GSM-EDGE/Bluetooth/WCDMA Continuous- Time Quadrature Bandpass ΔΣ modulator. Based on the low power design issue, we utilize backend I/Q mismatch shaping technique with digital circuit to assist ADC in reducing power consumption and decreasing I/Q mismatch effect in Continuous-Time Quadrature Bandpass ΔΣ modulator to get high image rejection ratio (IRR). This work is implemented with TSMC 0.18-um process under 1.8-V supply voltage. The modulator achieves 83/71/60 dB dynamic range at GSM-EDGE/Bluetooth /WCDMA tri-mode system while dissipating less than 9mW from measurement result. The equivalent FOM are 1.77/1.46/1.36 (pJ/conv.) The inter-modulation distortion (IMD) distances are better than 66 dB and IRR performances are better than 65dB at all modes. The chip area is about 1.448 x 1.368 mm2. In Chapter 5, the second one is a GSM-EDGE/UMTS/DVB-T Continuous- Time Quadrature Bandpass ΔΣ modulator for programmable digital Low-IF receivers. Unlike the previous work, the proposed modulator operates in different modes with different sampling rates (51.2-240MHz) and achieves better FOM. Implemented with TSMC 0.18-um process under 1.8-V supply voltage, new tunable Low-IF and power scalable techniques are adopted. This post simulation result shows 83/63/62 dB SNDR at GSM-EDGE/UMTS/DVB-T tri-mode system and overall FOM are 1.06/0.82/0.81 (pJ/conv.). The chip area is about 1.538 x 1.458 mm2.
Databáze: Networked Digital Library of Theses & Dissertations
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