Design of a Fractional-N Synthesizer with Quadrature Output for ZigBee System
| Autor: | Kun-Shian LIn, 林昆賢 |
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| Rok vydání: | 2010 |
| Druh dokumentu: | 學位論文 ; thesis |
| Popis: | 98 This thesis presents a frequency synthesizer with quadrature VCO for ZigBee system. To achieve high performance, this thesis proposes a architecture of the quadrature VCO with low-power consumption and low-phase noise. The quadrature VCO in this thesis adopts the stack-up structure to reuse the current, so that the current would flow from PMOS VCO to NMOS VCO, which is called “current reuse”. And a series coupling architecture, which is series connection with the cross coupling pair, is adopted to provide the quadrature signal. Thus a new quardature VCO called “A series coupled current reused quardature VCO” is proposed. The quardature VCO consum 2.61 mW while the supply voltage is 1.8 V. The phase noise is -122.5 dBc/Hz under the free running frequency. Moreover, the synthesizer contains the quadrature VCO as mention before. It is designed under fully consideration on noise suppression and power consumption. The synthesizer is operated at the frequency between 2403 MHz and 2478 MHz and the settling time is 33 μs. The synthesizer consums 15.35 mW at the supply voltage of 1.8 V. |
| Databáze: | Networked Digital Library of Theses & Dissertations |
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