Characterization of HfO2 Gate Dielectric with Fluorine Doped Interface
| Autor: | Cheng-Chung Yang, 楊政忠 |
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| Rok vydání: | 2009 |
| Druh dokumentu: | 學位論文 ; thesis |
| Popis: | 97 In this thesis, metal-oxide-semiconductor capacitors (MOSC) with high-k dielectric HfO2 deposited by metal-organic chemical vapor deposition (MOCVD) were fabricated, and fluorine ions were deliberately implanted into the HfO2 and HfO2/Si interface. Room temperature current-voltage (I-V) and capacitance-voltage (C-V) characteristics were obtained to compare the differences of the electrical and reliability properties of the MOSC with HfO2 gate insulator having and having not fluorine doped interface. It is known that fluorine incorporation at the interface of gate insulator can reduce the dangling bonds at the interface and passivate the bulk traps in the HfO2 gate dielectric, hence improve the HfO2 thin film characteristics. Since the re-crystallization temperature of HfO2 film is low, an annealing at temperature higher than 500℃ might cause HfO2 thin film to re-crystallize and thus weaken the insulation property of the gate dielectric. When fluorine is incorporated, the HfO2 film will transform into HfOxFy which has higher re-crystallization temperature than has the HfO2. Therefore, another advantage of fluorine incorporation in high-k dielectric is thermal stability improvement. It is found that the gate leakage current can also be decreased effectively after fluorine is introduced into the high-k gate dielectric HfO2, which can be inferred from the obvious increase in the accumulation capacitance of the MOSC. The hysteresis can also be reduced for the samples with fluorine incorporation due to the interface trap passivation. In this work, both the constant voltage stress (CVS) and constant current stress (CCS) were applied to all the samples to check the reliability issues caused by fluorine incorporation. We found that the fluorine-implanted samples exhibited smaller flan-band voltage shift and less stretch out in the high-frequency C-V curves. This is due to the incorporated fluorine ions at the silicon/dielectric interface enhance the bond strength and therefore decrease bond breakage during the application of stresses. This can be confirmed from the reduction of mid-gap interface trap density in fluorine-implanted samples as compare with those non-fluorine implanted samples. It is found that there exists an optimum concentration for fluorine incorporation. From our experimental data, we see that the improvement in leakage current, hysteresis, flat-band voltage shifts, and interface trap density vanishes when the incorporated fluorine concentration is larger than 5E15 cm-2. Therefore, care should be taken if fluorine incorporation is to be used to improve the reliability of high-k dielectric in MOS devices. |
| Databáze: | Networked Digital Library of Theses & Dissertations |
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