The Design and Application of a High-performance DLL
| Autor: | Keng-Jan Hsiao, 蕭耕然 |
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| Rok vydání: | 2008 |
| Druh dokumentu: | 學位論文 ; thesis |
| Popis: | 96 The delay-locked loop(DLL) is widely used in many aspects, such as the generation of multiphase clocks or clock generator. In this dissertation, a fully integrated multiplying DLL and a distributed DLL are covered. A general impedance converter (GIC) is used in multiplying DLL to greatly reduce the chip area. To solve the problem brought by the loss in a GIC, an adaptive current tuning technique is proposed. The multiphase clocks are typically suffered from the random mismatches with different devices. The distributed DLL is designed for the generation of multiphase clocks with good phase accuracy and low jitter, which requires no extra calibration circuits. The on-chip capacitance multiplication is typically realized by Miller effect, but the capacitance multiplication factor is limited due to device mismatches. A GIC is utilized to greatly multiply the on-chip capacitor by 2000 times. The nonidealities in a GIC are analyzed. To solve the problem, an adaptive current tuning technique is proposed to deal with the loss in a GIC. The concept and the architecture of the clock generator with adaptive current tuning are presented. A system model for the analysis of the stability and the dynamic behavior is provided. The clock generator occupies an active area of 0.09 mm2 in a 0.18 |
| Databáze: | Networked Digital Library of Theses & Dissertations |
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