Fabrication and Characterizations of Poly-Si Nanowire Thin-Film Transistor and SONOS Memory Featuring Inverse-T Gate
| Autor: | Hsing-Hui Hsu, 徐行徽 |
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| Rok vydání: | 2008 |
| Druh dokumentu: | 學位論文 ; thesis |
| Popis: | 96 In this thesis, a poly-Si nanowire TFT device with multiple-gated configuration was fabricated by utilizing a simple and low-cost spacer etching technique. With the aid of strong coupling effect between the inverse-T gate and the top gate due to the tiny body of the NW channels, the electrical characteristics are greatly enhanced. In addition, the threshold voltage is capable of being finely tuned with a proper gate bias. Based on this unique independent double-gate structure, NW TFT-SONOS memory devices were also fabricated and characterized. The two gates which function as programming gate and threshold voltage adjusting gate, respectively, provide flexibility for programming and reading operations. The electrical characteristics including program/erase properties were also studied. Additionally, adding an adequate top-gate bias is found to improve the programming efficiency, resulting in larger memory window. |
| Databáze: | Networked Digital Library of Theses & Dissertations |
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