BUS TYPE DRIVING CIRCUIT OF 20' FIELD EMISSION DISPLAY
| Autor: | Ching-shun Yang, 楊景舜 |
|---|---|
| Rok vydání: | 2007 |
| Druh dokumentu: | 學位論文 ; thesis |
| Popis: | 95 This thesis presents a bus type driving circuit for 20-inch field emission display (FED) of Tatung Company. The display goal is: frame rate 60fps, monitor resolution 800×600, 24 bits color depth, and non-interlaced scan. It contains a main controller as a bus master. Scan and data controller are bus slaves. The main controller is also connecting with input signal sent from DVI receiver and stored in two bank SRAMs. Using a divided pulse width modulation (PWM) method which is called frame rate control (FRC) method in plasma display panel (PDP), the input data should divided into eight weights. The scan driver is just selecting row one by one. The data driver is generating eight kinds of sub-frames. Then these sub-frames can generate 256 gray levels. The designed driving logic can be implemented in FPGA and simulated in Xilinx ISE 9.1. |
| Databáze: | Networked Digital Library of Theses & Dissertations |
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