A Vernier-Based Time-to-Digital Converter
| Autor: | You-Sheng Shen, 沈宥昇 |
|---|---|
| Rok vydání: | 2007 |
| Druh dokumentu: | 學位論文 ; thesis |
| Popis: | 95 The time-to-digital converters (TDC) are commonly used in many instrumentation systems or equipments. So far, many kinds of structure were developed for every different requirement. Among these structures, the vernier time-to-digital converter is the best at highly accurate time resolution. However, the input range cannot exceed one period of the reference clock, and the complex calibration mechanism is used for the mismatch between elements. Therefore, a new vernier-based TDC with dual phase-locked loops (PLL) was proposed to improve the two disadvantages, but with wider input range. In fact, when using the TDC in measuring long time period between two signals, there are many errors in this application. In order to improve these problems, we feed the reference clock of coarse counter from the voltage-controlled oscillator in PLL. Besides, with the same circuit complexity and operating frequency, we imply technology of double data rate to increase the time resolution. The proposed TDC has been implemented in 0.35μm standard 2P4M CMOS technology. By simulating in HSpice, the expected time resolution is 12.5ps. The power consumption is 60mW, and the chip size is as small as 0.342mm2. |
| Databáze: | Networked Digital Library of Theses & Dissertations |
| Externí odkaz: |
|