Design and Implementation of Low Power 2-D Transform Architecture with Unique Kernel for Multi-Standard Video Coding Applications
| Autor: | Chong-Yu Huang, 黃重裕 |
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| Rok vydání: | 2007 |
| Druh dokumentu: | 學位論文 ; thesis |
| Popis: | 95 In recent years, digital signal processing has significant effects and it is the most important job to design a low power circuit for portable devices. The discrete cosine transform (DCT) has been extensively applied to image and video coding standard. Designing circuit not only requires low power but also supports multi-standard video coding applications in order to meet the requirements of various video coding standards. However, no circuits can meet so far. Therefore, it is worth to research such a topic. In the thesis, we adopt a new distributed arithmetic algorithm (NEDA) to implement our architecture. There are multiplier-free and ROM-free to make architecture easily to be implemented by some shifts and adders. Therefore, we propose an efficient 2-D transform architecture with unique kernel that can support traditional 8x8 DCT, 8x8 and 4x4 integer transform for multi-standard video coding applications. Furthermore, we utilize adder tree to improve low throughput problem that adopts DA algorithm. Our throughput rate is 400M pixels/s that can process real-time HDTV 720p, 1080p and digital cinema video at 6M Hz, 12M Hz and 48M Hz frequency, respectively. In order to reduce power consumption, we find an efficient approach to simplify number of adder to reduce computation more than 95.8% in terms of traditional DCT. According to experimental results, the power consumption of our proposed architecture is 38.7mW at 50M Hz frequency. Therefore, our proposed architecture has properties of high throughput and low cost to achieve low power effect. In the same way, we also propose IDCT architecture for multi-standard video coding applications. From the viewpoint of the VLSI realization, the proposed architecture is also simple, modular, and regular. For H.264/AVC standard, we also propose a high throughput direct 2-D multiple transforms using the same algorithm. This architecture can support four transforms that include 4x4 forward integer transform, Hadamard transform, inverse integer transform and inverse Hadamard transform. According to synthesis result, the throughput rate can achieve 800M pixels/s at 100M Hz frequency. |
| Databáze: | Networked Digital Library of Theses & Dissertations |
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