Design of High Efficiency Intra-Prediction Mode-Selection in H.264/AVC
| Autor: | Jian-Jyun Hong, 洪健鈞 |
|---|---|
| Rok vydání: | 2006 |
| Druh dokumentu: | 學位論文 ; thesis |
| Popis: | 94 Digital video technology has played an important role in our daily life. With the evolution of video technology coding efficiency has been greatly improved. H.264 can provides approximately 50% bit rate saving for equivalent perceptual quality relative to the performance of prior standards. However, this efficiency comes with the cost of much higher computational complexity than previous standards due to the complex coding approaches and mode decision techniques. Thus, how to design high performance functional units and reduce computational complexity without great quantity of degradation in coding efficiency are deserved to be mentioned. In this thesis, a fast intra-prediction mode-decision (IPMS) algorithm and the corresponding hardware design are proposed to effectively speed up the encoding time for mode decision in H.264/AVC. Based on the block type selection approach, the local edge information obtained by calculating edge feature parameters and sub-sampling of matching operations, the proposed IPMS algorithm can reduce the encoding time over 65% considerably with less than 3.7% extra bits used and no more than 0.7 dB PSNR sacrificed. The hardware architecture design is implemented by using the Verilog HDL coding. Through the Quartus II verification, the equivalent gate counts of the proposed hardware architecture are about 33.7K. Verification results and performance evaluation reveal that the reliability and feasibility of the proposed hardware design based on IPMS algorithm. |
| Databáze: | Networked Digital Library of Theses & Dissertations |
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