High-Level Current Macro Model usingNeural Network
| Autor: | Yu-Cheng Yang, 楊侑承 |
|---|---|
| Rok vydání: | 2006 |
| Druh dokumentu: | 學位論文 ; thesis |
| Popis: | 94 Nowadays, the era of system on chip design, we hope to know about the current information of the logic block for shorting the design cycle and improving the reliability and performance of the chips. Therefore we can optimize the power and consider about the noise influence, such like SSN, IR-Drop, as soon as possible. And the current information also help for the design of power line and layout. So the high level current model plays an important role of the system on chip design. We do not need to know the detail information for drawing the current waveform of the logic block. And the IP protection is the advantage of the high level model. In this thesis, we propose a high level current model constructed by neural network. We got parts of current waveforms by HSPICE simulation. And use the levelize technique to simplify the relationship of waveform and the input output transition status. Merge the same level input and output can reduce the complexity of the neural network. Follow the flow which we proposed, the model will be constructed. We can use this model to estimate current waveforms which have different shapes. It is very convenient use and efficient computation. |
| Databáze: | Networked Digital Library of Theses & Dissertations |
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