Single Phase-Locked Loop Frequency Synthesizer Design for Ultra-wideband Wireless Applications
| Autor: | Jiun-Shian Lai, 賴俊憲 |
|---|---|
| Rok vydání: | 2006 |
| Druh dokumentu: | 學位論文 ; thesis |
| Popis: | 94 A CMOS frequency synthesizer which synthesizes all band groups of the ultra-wideband (UWB) system is presented. Only one phase-locked loop is used in this synthesizer to reduce interference of VCOs in multi-PLL frequency synthesizers. Divide-by-two circuit chains are used in the PLL to generate intermediate frequencies and reduce the numbers of required single-sideband (SSB) mixers for all-band frequency synthesis and thus achieve fast switching time. To suppress spurious emissions, the frequency synthesizer employs dividers and SSB mixers in the signal generation path. LC resonant loads at the output buffer together with negative resistances and switching inductors help to suppress more spurious signals and operate in wider frequency range. The spurious suppression is better than -24dBc in all band groups. |
| Databáze: | Networked Digital Library of Theses & Dissertations |
| Externí odkaz: |
|