Effects of Nitridation and Fluorine Incorporation on the Electrical Characteristics and Reliabilities of MOSFETs with HfO2/SiON Gate Stack

Autor:	Wen-Tai Lu, 盧文泰
Rok vydání:	2005
Druh dokumentu:	學位論文 ; thesis
Popis:	94 As CMOS devices are scaled aggressively into nanometer regime, SiO2 gate dielectric is approaching its physical and electrical limits. The primary issue is the intolerably huge leakage current caused by the direct tunneling of carriers through the ultrathin oxide. To substantially suppress the leakage current, high-k materials are recently employed by exploiting the increased physical thickness at the same equivalent oxide thickness (EOT). In this dissertation, the electrical characteristics of pMOSFETs with HfO2/SiON gate stack subjected various Nitridation, i.e., pre-deposition plasma treatments, post-deposition N2O plasma Nitridation, low temperature NH3 Nitridation, and incorporated with Fluorine were discussed. The related reliabilities, including CVS stress, NBTS, dynamic unipolar AC stress, and charge traping, were comprehensively investigated. In addition, the characteristics of plasma charging damage of the HfO2 high k film few reported and the impact of plasma charging damage on NBTI effects also were studied in detail. Moreover, we also investigate the threshold voltage instability in high k film, due to fast charge trapping at Fast Transient Charge Trap (FTCT), by using the single pulse Id-Vg measurement. First, we investigated the effects of various pre-deposition plasma treatments (NH3 and N2O) on Si surface to form an interfacial layer before deposition HfO2 gate dielectric. In order to significantly reduce gate leakage current, a good quality interfacial layer is essential before deposition of high k film. However, our results show that samples with various gas plasma pre-treatments still result in poor electrical properties and the leakage current does not meet device criterion. A conventional RTA is found to be necessary to repair the damage in the interfacial layer. Samples with plasma pre-treatment and RTA anneal depict lower leakage current, smaller hysteresis and frequency dispersion, and higher breakdown voltage. In addition, NH3 pre-treatment also results in longer time to breakdown, larger charge to breakdown and better characteristics life time. The samples with conventional RTA show much lower leakage current, lower frequency dispersion, and smaller hysteresis than as-deposited, spike RTA and no RTA samples because of a thicker interfacial layer. Therefore, RTA is still an essential process after pre-treatment to densify nitrided interfacial layer. We also found that the dominant charge trapping mechanism in the high-k gate stack is hole trapping rather than electron trapping. This behavior can be well described by the distributed capture cross section model. In particular, the flatband voltage shift (�幀fb) is mainly caused by the trap filling instead of the trap creation. The dominant hole trapping can be ascribed to a higher probability for hole tunneling from the substrate, compared to electron tunneling from the gate, due to a shorter tunneling path over the barrier for holes due to the work function of the TiN gate electrode. Second, we proposed a post-deposition low-temperature (~ 400°C) NH3-treatment on the HfO2/SiO2 gate stacks with TiN gate electrode. Our results indicate that samples subject to the LTN treatment exhibit superior C-V characteristics, less frequency dispersion, and lower gate leakage. In addition, the defect density in the bulk and the immunity against trap generations are significantly improved, especially for samples with subsequent 700°C PDA. Moreover, we find that the trap-assisted hole tunneling mechanism is responsible for the increase in gate leakage current after constant voltage stress. Next, we used post-deposition N2O plasma treatment to improve the characteristics of pMOSFETs with HfO2/SiON gate stack. We have found that the improvements include many aspects, such as the reduced leakage current, the better subthreshold swing, the enhanced normalized tranconductance, and the higher driving current. Those were ascribed to the lower interface states and bulk traps, confirmed by various type of charge pumping measurement. In evaluation of the reliability, it was found that the degradation caused by the voltage stress and NBTI was dominated by the charge trapping in the bulk of HfO2 films rather than interface states generation no matter whether the N2O plasma treatment was employed or not. In addition, it was observed that the N2O plasma treatment did significantly improve the charge trapping characteristics and the electron trapping is the main mechanism during stressing, which was opposite to the hole trapping observed in the case without the N2O plasma treatment. Under dynamic AC stress, both the off-time de-trapping and the lack of hole trapping due to short on-time are required to explain the behavior of threshold voltage degradation. Finally, through the help of carrier separation experiments, we have clarified whether the breakdown originates in the bulk or the interfacial layer. Finally, we investigate the effects of fluorine (F) incorporation into HfO2/SiON gate stack on the reliabilities of pMOSFETs with HfO2/SiON gate stack. Fluorine was incorporated before the source/drain implant step, which was subsequently diffused into the gate stack during later dopant activation. We found that F introduction only negligibly impacts the fundamental electrical properties of the fabricated transistors. In addition, under constant voltage stress (CVS) and negative bias temperature stress (NBTS), lower generation rates of interface states and charge trapping are observed for devices with F incorporation, thus enhances high-k devices’ stability and reliability. Next, effects of plasma charging and fluorine incorporation were also explored thoroughly. We find that the interface-state density is increased for devices with large antenna ratio, both before and after the BTS. It is clearly shown that the threshold voltage shift during negative bias-temperature stressing (NBTS) is deteriorated by plasma charging damage, causing severe hole traps, which is different from that observed in traditional pMOSFETs with SiO2 gate dielectric where electron trapping is dominant. More importantly, we also found that hole trappings are aggravated in HfO2 film as compared to interface trap generation by plasma charging. Fluorine incorporation would effectively improve plasma charging immunity, thus reducing the severe hole trapping under NBTS for devices with large antenna area ratios. F incorporation is effective in suppressing hole trapping as well as interface trap generation, thus improving threshold voltage instability. Furthermore, fluorine incorporation maintains almost the same activation energies of threshold voltage shift is 0.08 eV and that of interface trap generation is 0.14 eV for both devices. Fluorine is found to be able to electrically passivate traps without changing the NBTI mechanism. The experimental results of dynamic AC stressing show that threshold voltage shifts toward more negative voltage in DC stress, but shifts toward more positive voltage under AC unipolar stress. This is believed to be due to less hole charge trapping during on-time of a AC cycle and more hole charge de-trapping during off-time of a AC cycle. The interface trap generation depends weakly on both frequency and duty cycle. Instead of interface trap, the bulk trap of HfO2 eventually plays a preponderant role during AC stress.
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Externí odkaz:	http://ndltd.ncl.edu.tw/handle/59316248403755738419 Zobrazit plný text záznamu