Analysis the Inductance Characteristics of the Via Structure on 4/6-layer Printed Circuit Board
| Autor: | Yi-Long Chen, 陳怡龍 |
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| Rok vydání: | 2005 |
| Druh dokumentu: | 學位論文 ; thesis |
| Popis: | 93 With fast increase of clock frequency, the high frequency noise on power distribution network caused by ground bounce is a primary source of electromagnetic interference (EMI) and signal integrity. In multilayer printed circuit boards, it is prevalent to use dedicated power／ground plane pair(s) for power delivery network. The decoupling capacitor is to usually employed suppress the ground bounce, but its intrinsic inductance and parasitic inductance associated with the mounting structure used affect the capacitor’s decoupling performance at high frequencies. In this thesis, we use HFSS to analyze several different kinds of vias structures to find out its equivalent inductance value. We also discusses how to reduce the equivalent inductance value of vias structure. |
| Databáze: | Networked Digital Library of Theses & Dissertations |
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