Segmented Instruction Compression and Decompression System
| Autor: | Jen-Wei Hsieh, 謝振威 |
|---|---|
| Rok vydání: | 2006 |
| Druh dokumentu: | 學位論文 ; thesis |
| Popis: | 93 We propose a code compression approach to reduce the size of memory usage in ARM7TDMI architecture. This causes a high degree of repetition in the encoding of the instructions in a program. Therefore we compress the program code. Owing to the instructions are compressed, the compressed instructions must be decompressed before the processor execution. Therefore the system performance will incur penalty. In our decompression portion, we propose a method that combines next prediction and branch prediction. The method can avoid performance penalty, and can increase the system performance. We design a decompression circuits, it is structures based on a parallel approach. Based on the ARM’ memory system architecture, we inserted the decompression circuit between program memory and processor. They connect via the system bus. In the experimental results shown, the average compression ratio is 58%. Our optimization decompression system is faster than a basic system. It has not performance loss. |
| Databáze: | Networked Digital Library of Theses & Dissertations |
| Externí odkaz: |
|