Design of Bit Depth Search ECG Compression VLSI Architecture
| Autor: | Shih Fan Yu, 游適帆 |
|---|---|
| Rok vydání: | 2005 |
| Druh dokumentu: | 學位論文 ; thesis |
| Popis: | 93 Electrocardiogram (ECG) compression can reduce the amounts of data storage in long-term recording and the payload in real-time wireless transmission. As the need for integrating several physiological signals in system on a chip (SoC), the VLSI implementation of ECG compression is beneficial to reduce the computational load of processor. In this thesis, a bit-depth coding was proposed. With predefined searching depths for each wavelet bands, the significant wavelet coefficients are encoded within enough bit-precisions. On the basis of the MIT/BIH Arrhythmia database, the compression rate and the percentage of root-mean-squared error are respectively 5 and 0.656 % with the searching depths of IA3=7, ID3=7 and I[D1 D2]=4. Moreover, the VLSI circuit of the proposed ECG compression including three-level Harr discrete wavelet transform and the bit-depth coding was successfully implemented with the Verilog hardware description language. |
| Databáze: | Networked Digital Library of Theses & Dissertations |
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