Design and Implementation of aLow-Voltage Low-Noise Amplifier
Autor: | Hsing-Chien Chang, 張行健 |
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Rok vydání: | 2003 |
Druh dokumentu: | 學位論文 ; thesis |
Popis: | 91 This thesis presents a design of low noise amplifier with on-chip inductors integrated in a TSMC 0.25 CMOS process for 2.4 GHz wireless applications. An additional capacitance in parallel with the gate capacitance of the amplifying transistor is used to optimize the noise performance with low power dissipation. An interstage inductor between the common source stage and the common gate stage is used to increase power gain. It requires only a 1V supply. At 2.4 GHz, this LNA features: noise figure 2.3 dB with output return loss -84 dB and power gain 22 dB. This LNA presents the best-simulated noise figure and power dissipation performance reported for 2.4 GHz CMOS LNA. |
Databáze: | Networked Digital Library of Theses & Dissertations |
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