Study on the Current-Voltage and Breakdown Characteristics for MOS Devices with Ultra-Thin Gate Oxides under High Field Stress
| Autor: | Chia-Hong Huang, 黃嘉宏 |
|---|---|
| Rok vydání: | 2001 |
| Druh dokumentu: | 學位論文 ; thesis |
| Popis: | 89 The effect of interface and oxide traps on the current-voltage and oxide breakdown characteristics for metal-oxide-semiconductor ( MOS ) structures with ultra-thin gate oxides was studied in this work. In addition, we also investigate the difference of those between the front- and back-side heated samples whether for rapid thermal oxidation ( RTO ) or for rapid thermal post oxidation annealing ( POA ) processing. The effect of oxide barrier shape change caused by stress-induced interface trap charges on the low-voltage tunneling current ( LVTC ) characteristics of ultra-thin gate oxides ( ~2nm ) is first studied. It was found that for an ultra-thin gate oxide working in the direct tunneling regime, the LVTC behavior is strongly dependent on the barrier shape of the oxide. After high field stress, anomalous LVTC phenomenon is observed. There is an invariant point existing in current-voltage ( I-V ) curves. For a bias smaller than the value of the invariant point, the gate current decreases with stress time. However, for a bias larger than that, the gate current increases with stress time and then saturates. This phenomenon cannot be explained by conventional trap-assisted tunneling conduction, but by the change of tunneling probability due to barrier shape variation. An interface trap charge model is proposed to explain the observed invariant point mentioned above. From this, one can find the voltage corresponding to the midgap bias and, therefore, the initial effective oxide charge number density. Then, the thin oxide property in an MOS structure subjected to substrate injection from semiconductor into oxide is investigated by means of ramp-up and ramp-down I-V measurements. Generally, the gate injection causes catastrophic dielectric breakdown, and the damaged oxide suffers from permanent destruction which exhibits resistor-like behavior in the I-V curves. For substrate injection, however, there are three distinct modes existing in I-V characteristics. They are resistor-like ( BD-R ), hysteresis-like ( BD-H ), and saturation, i.e., no breakdown ( NBD ). Besides, their occurrence frequencies are dependent on the oxide thickness. For oxides thinner than 2.4nm, in general, the gate current nearly saturates due to the limitation of minority carriers. For 3.9nm oxide, the minority carrier generation rate increases due to the increase in the trap density near Si surface. Thus the oxide sustains higher field and larger carrier injection, so that these cause the destructive damage, i.e., resistor-like mode. For 3nm oxide, sometimes the hysteresis-like mode appears due to light damage in the oxide. Moreover, the related characteristics of these modes are studied and exhibit oxide thickness dependence. These phenomena are important to recent study on devices with ultra-thin gate oxides. In addition, soft breakdown properties influenced by photon energy during rapid thermal post oxidation annealing ( POA ) for ultra-thin gate oxides are investigated. Generally, under gate injection oxide breakdown can be classified into normal hard breakdown ( HBD ) and soft breakdown ( SBD ). It was found that the occurrence of HBD and SBD depends on the process and stress field. Samples with front- and back-side illuminated by a tungsten halogen lamp during rapid thermal POA were examined. Moreover, we find that the front side illuminated oxides show easier SBD than the back side ones. These results indicate that the photon energy may not only enhance the strength of Si-O bonds to suppress the lateral propagation of breakdown spots, but also localize defects to form a conductive path of the leakage current. The understanding of the photon effect in rapid thermal POA is useful for controlling the electrical properties of ultra-thin gate oxides. Nevertheless, for the breakdown behavior under substrate injection, it was found that the occurrence frequency of BD-H mode is larger for the front-side heated samples than for the back-side ones whether for RTO processing or for POA one. It is believed that for substrate injection, the oxide breakdown is related to oxide quality and the minority carrier generation rate contributed by defect density in substrate. The distribution of defects can be influenced by the illumination processing. It was also observed that for POA processing, the gate saturation current density is larger for the front-side heated samples than for the back-side ones. From C-V measurements with various frequencies, furthermore, it was observed that the generation rate of minority carriers is larger for the front-side heated samples than for the back-side ones. These results show that Si bulk traps are much easy to be created in the direct illumination processing. From above observation, we conclude that photon energy plays an important role in rapid thermal processing ( RTP ). The characteristics of MOS structures can be influenced by the direct illumination during RTP. |
| Databáze: | Networked Digital Library of Theses & Dissertations |
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