nter-Locking Design and Study of Voltage-Controlled Ring Oscillator
| Autor: | Jen-Wei Tsai, 蔡正偉 |
|---|---|
| Rok vydání: | 2000 |
| Druh dokumentu: | 學位論文 ; thesis |
| Popis: | 88 This paper describes a new voltage-controlled oscillator(VCO) structure based on a ring oscillator. We use five inter-locking ring oscillators to increase the Q value of the VCO. According to simulations, we notice that the phase noise of this new ring oscillator structure is better than the conventional one。 For the purpose of measurement, we design a PLL chip including the new VCO. The PLL circuit has five components, which are the VCO, the phase-frequency detector, the charge pump, the loop filter, and the frequency divider.The loop filter is designed outside the chip, so we can change the loop filter elements easily. This chip will be fabricated in TSMC 1p3m 0.6 m process. Simulation shows that the VCO operates at about 800MHz~1GHz with 2.5V power supply and consumes 21mW power. The PLL lock time is about 10 s, 3dB bandwidth is about 330kHz, and the total power consumpation is about 75mW. |
| Databáze: | Networked Digital Library of Theses & Dissertations |
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