TU-2 Mapper Design
| Autor: | Wen-Jay Chen, 陳文傑 |
|---|---|
| Rok vydání: | 1999 |
| Druh dokumentu: | 學位論文 ; thesis |
| Popis: | 87 In Synchronous Digital Hierarchy (SDH) Network, Tributary Unit 2 (TU-2) maps the DS2 signal into a TU-2 superframe with payload pointer and path overhead. In this thesis, TU-2 mapper is designed by Xilinx FPGAs for transmit and receive device. A prototype circuit board is built with the designed TU-2 transmit and receive devices and the loopback test is verified by a transmission test set. The concatenated VC-2-nc supports broadband signals. Framd based or cell based services can be adapted to VC-2-nc format and transported in the SDH network. The VC-2-nc mapper is verified by Xilinx simulation tool in this thesis. |
| Databáze: | Networked Digital Library of Theses & Dissertations |
| Externí odkaz: |
|