A 1.2 V CMOS Analog to Digital Converter
| Autor: | Chauo-Huei Hsi, 徐朝輝 |
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| Rok vydání: | 1994 |
| Druh dokumentu: | 學位論文 ; thesis |
| Popis: | 82 Motivated by emerging battery-operated applications in portable environment, techniques are proposed which reduced supply voltage and power consumption in CMOS mixed-mode circuits. We proposed a low voltage analog signal processing system with fully differential topology and on-chip high voltage generation. It would double the dynamic range and reduce the noise effect. With this framework, a cyclic analog- to-digital converter with 1.2 V supply voltage has been developed associated with the design techniques for low voltage. It consists of two operational amplifiers, one comparator, switches and capacitors. The conversion characteristics are inherently insensitive both to capacitor ratio and to amplifier offset voltage, and the major error is from the finite gain of operational amplifier and the switch charge injection. An experimental prototype chip has been fabricated with a 0.8μm N- well CMOS process. It achieves an 8-bit resolution at a sampling rate of 8 kHz, and the chip area measures 12 m㎡. |
| Databáze: | Networked Digital Library of Theses & Dissertations |
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