How to avoid the generation of logic loops in the construction of fault trees
| Autor: | Demichela, M ∗, Piccinini, N, Ciarambino, I, Contini, S |
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| Zdroj: | In Reliability Engineering and System Safety 2004 84(2):197-207 |
| Databáze: | ScienceDirect |
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Full Text from ScienceDirect