Software-hardware co-design for accelerating large-scale graph convolutional network inference on FPGA
| Autor: | Ran, Shaolin, Zhao, Beizhen, Dai, Xing, Cheng, Cheng, Zhang, Yong |
|---|---|
| Zdroj: | In Neurocomputing 1 May 2023 532:129-140 |
| Databáze: | ScienceDirect |
| Externí odkaz: |
|
Full Text from ScienceDirect