Performances of gate stacked heterojunction SELBOX and SOI tunnel FETs including interface trap charges: A simulation study
| Autor: | Harsha, Nagendar, Tiwari, Shreyas, Chaudhary, Rashi, Saha, Rajesh |
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| Zdroj: | In Materials Science & Engineering B February 2024 300 |
| Databáze: | ScienceDirect |
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