Vertically-stacked gate-all-around polysilicon nanowire FETs with sub-[formula omitted]m gates patterned by nanostencil lithography
| Autor: | Sacchetto, Davide, Xie, Shenqi, Savu, Veronica, Zervas, Michael, De Micheli, Giovanni, Brugger, Jürgen, Leblebici, Yusuf |
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| Zdroj: | In Microelectronic Engineering October 2012 98:355-358 |
| Databáze: | ScienceDirect |
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