A 2xVDD digital output buffer with gate driving stability and non-overlapping signaling control for slew-rate auto-adjustment using 16-nm FinFET CMOS process
| Autor: | Wang, Chua-Chin, Tolentino, Lean Karlo S., Lu, Shao-Wei, Jose, Oliver Lexter July A., Sangalang, Ralph Gerard B., Lee, Tzung-Je, Lou, Pang-Yen, Chang, Wei-Chih |
|---|---|
| Zdroj: | In Integration May 2023 90:245-260 |
| Databáze: | ScienceDirect |
| Externí odkaz: |
|
Full Text from ScienceDirect