Layout-aware design methodology for a 75 GHz power amplifier in a 55 nm SiGe technology
| Autor: | del Rio, David, Gurutzeaga, Iñaki, Solar, Hector, Beriain, Andoni, Berenguer, Roc |
|---|---|
| Zdroj: | In Integration, the VLSI Journal January 2016 52:208-216 |
| Databáze: | ScienceDirect |
| Externí odkaz: |
|
Full Text from ScienceDirect