Circuit design of a dual-versioning L1 data cache
| Autor: | Seyedi, Azam, Armejach, Adrià, Cristal, Adrián, Unsal, Osman S., Hur, Ibrahim, Valero, Mateo |
|---|---|
| Zdroj: | In Integration, the VLSI Journal June 2012 45(3):237-245 |
| Databáze: | ScienceDirect |
| Externí odkaz: |
|
Full Text from ScienceDirect