Delay caused by resistive opens in interconnecting lines
| Autor: | Arumí, D., Rodríguez-Montañés, R., Figueras, J. |
|---|---|
| Zdroj: | In Integration, the VLSI Journal 2009 42(3):286-293 |
| Databáze: | ScienceDirect |
| Externí odkaz: |
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| Autor: | Arumí, D., Rodríguez-Montañés, R., Figueras, J. |
|---|---|
| Zdroj: | In Integration, the VLSI Journal 2009 42(3):286-293 |
| Databáze: | ScienceDirect |
| Externí odkaz: |
|
Full Text from ScienceDirect