High-speed FPGA implementation of full-word Montgomery multiplier for ECC applications
| Autor: | Khan, Safiullah, Javeed, Khalid, Shah, Yasir Ali |
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| Zdroj: | In Microprocessors and Microsystems October 2018 62:91-101 |
| Databáze: | ScienceDirect |
| Externí odkaz: |
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| Autor: | Khan, Safiullah, Javeed, Khalid, Shah, Yasir Ali |
|---|---|
| Zdroj: | In Microprocessors and Microsystems October 2018 62:91-101 |
| Databáze: | ScienceDirect |
| Externí odkaz: |
|
Full Text from ScienceDirect