A design methodology and various performance and fabrication metrics evaluation of 3D Network-on-Chip with multiplexed Through-Silicon Vias
| Autor: | Said, Mostafa, Shalaby, Ahmed, Mehdipour, Farhad, Biglari-Abhari, Morteza, El-Sayed, Mohamed |
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| Zdroj: | In Microprocessors and Microsystems June 2016 43:26-46 |
| Databáze: | ScienceDirect |
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Full Text from ScienceDirect