Ultra low energy design exploration of digital decimation filters in 65 nm dual-VT CMOS in the sub-VT domain
Autor: | Yasser Sherazi, S.M., Rodrigues, Joachim N., Akgun, Omer C., Sjöland, Henrik, Nilsson, Peter |
---|---|
Zdroj: | In Microprocessors and Microsystems June-July 2013 37(4-5):494-504 |
Databáze: | ScienceDirect |
Externí odkaz: |