Design of SOI FinFET on 32 nm technology node for low standby power (LSTP) operation considering gate-induced drain leakage (GIDL)
| Autor: | Cho, Seongjae, Lee, Jung Hoon, O’uchi, Shinichi, Endo, Kazuhiko, Masahara, Meishoku, Park, Byung-Gook |
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| Zdroj: | In Solid State Electronics 2010 54(10):1060-1065 |
| Databáze: | ScienceDirect |
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Full Text from ScienceDirect