105 nm Gate length pMOSFETs with high-K and metal gate fabricated in a Si process line on 200 mm GeOI wafers
| Autor: | Le Royer, C., Clavelier, L., Tabone, C., Romanjek, K., Deguet, C., Sanchez, L., Hartmann, J.-M., Roure, M.-C., Grampeix, H., Soliveres, S., Le Carval, G., Truche, R., Pouydebasque, A., Vinet, M., Deleonibus, S. |
|---|---|
| Zdroj: | In Solid State Electronics September 2008 52(9):1285-1290 |
| Databáze: | ScienceDirect |
| Externí odkaz: |
|
Full Text from ScienceDirect