A new CMP-less integration approach for highly scaled totally silicided (TOSI) gate bulk transistors based on the use of selective S/D Si epitaxy and ultra-low gates

Autor: Müller, Markus, Mondot, Alexandre, Aimé, Delphine, Froment, Benoît, Talbot, Alexandre, Roux, Julien-Marc, Ribes, Guillaume, Morand, Yves, Descombes, Sophie, Gouraud, Pascal, Leverd, François, Pokrant, Simone, Toffoli, Alain, Skotnicki, Thomas
Zdroj: In Solid State Electronics 2006 50(4):620-625
Databáze: ScienceDirect
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