Design and verification of multiple SEU mitigated circuits on SRAM-based FPGA system
| Autor: | Yu, Jian, Cai, Chang, Ning, Bingxu, Gao, Shuai, Liu, Tianqi, Xu, Liewei, Shen, Mingjie, Yu, Jun |
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| Zdroj: | In Microelectronics Reliability November 2021 126 |
| Databáze: | ScienceDirect |
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