Impact of interface trap charges on electrical performance characteristics of a source pocket engineered Ge/Si heterojunction vertical TFET with HfO2/Al2O3 laterally stacked gate oxide
| Autor: | Tripathy, Manas Ranjan, Samad, A., Singh, Ashish Kumar, Singh, Prince Kumar, Baral, Kamalaksha, Mishra, Ashwini Kumar, Jit, Satyabrata |
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| Zdroj: | In Microelectronics Reliability April 2021 119 |
| Databáze: | ScienceDirect |
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