Application of Scanning Capacitance Microscopy on SOI device with wafer edge low yield pattern
| Autor: | Chen, C.Q., Ang, G.B., Ng, P.T., Rivai, Francis, Neo, S.P., Nagalingam, D., Yip, K.H., Lam, Jeffery, Mai, Z.H. |
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| Zdroj: | In Microelectronics Reliability September 2017 76-77:141-144 |
| Databáze: | ScienceDirect |
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