Node-to-node error sensitivity analysis using a graph based approach for VLSI logic circuits
| Autor: | Hamiyati Vaghef, Vahid, Peiravi, Ali |
|---|---|
| Zdroj: | In Microelectronics Reliability January 2015 55(1):264-271 |
| Databáze: | ScienceDirect |
| Externí odkaz: |
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| Autor: | Hamiyati Vaghef, Vahid, Peiravi, Ali |
|---|---|
| Zdroj: | In Microelectronics Reliability January 2015 55(1):264-271 |
| Databáze: | ScienceDirect |
| Externí odkaz: |
|
Full Text from ScienceDirect