On-chip measurement to analyze failure mechanisms of ICs under system level ESD stress
| Autor: | Caigneť, F., Nolhier, N., Bafleur, M., Wang, A., Mauran, N. |
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| Zdroj: | In Microelectronics Reliability September-November 2013 53(9-11):1278-1283 |
| Databáze: | ScienceDirect |
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