Design optimization of gate-silicided ESD NMOSFETs in a 45 nm bulk CMOS technology

Autor: Alvarez, David, Chatty, Kiran, Russ, Christian, Abou-Khalil, Michel J., Li, Junjun, Gauthier, Robert, Esmark, Kai, Halbach, Ralph, Seguin, Christopher
Zdroj: In Microelectronics Reliability 2009 49(12):1417-1423
Databáze: ScienceDirect